Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA

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Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA

Autori
 A.Marongiu, P.Palazzari
Parole chiave (Tematica)
FPGA Matrix-Vector
Data pubblicazione
22/06/2020
Fonte
35th International Conference High Performance Computing 2020 (ISC). Frankfurt/Main, Germany
LNCS vol. 12151. Ed Springer