ISC 2020. High Performance 2020 Digital

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2020-06-22 11:52 - 2020-06-25 11:53

Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA

Il lavoro è stato preparato da Paolo Palazzari e da Alessandro Marongiu e verrà presentato al prossimo ISC 2020, High Performance 2020 Digital dal 22-25 giugno 2020.



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